Technical Field
The present invention relates to transistors, and more particularly, to transistors including materials having distinct coefficients of diffusion and methods of forming the same.
Related Art
State of the art transistors can be fabricated by forming a gate stack over or around a semiconductor substrate. Generally, transistor fabrication implements lithography and etching processes to define the gate stacks and channels. The channels are defined within a lightly doped portion of the substrate and the gate stacks are formed over the channels. The channel doping is typically selected to be opposite to that of transistor charge carriers. For instance, an n-channel transistor that employs electrons as charge carriers will have a lightly doped p-type channel. The term “p-type” refers to the addition of impurities to an intrinsic semiconductor that creates deficiencies of valence electrons. “N-type” refers to the addition of impurities that contributes free electrons to an intrinsic semiconductor. After providing the gate stacks over the channel, a source and a drain may be formed into a portion of the substrate and on both sides of each gate stack by ion implantation. Sometimes this implant is performed using a spacer to create a specific distance between the channel and the implanted junction. Sources and drains may be doped with a p-type or n-type dopants to form p-channel and n-channel transistors, respectively. After doping, the transistor may typically be subjected to a thermal treatment process in which the transistor is exposed to high temperatures for a specified period of time. Thermal treatment processes can result in diffusion of the dopants from the source and drain to the transistor body, or channel. Diffusion-enabled source and drain extensions overlap with the edges of the gate stack to allow for an unimpeded current flow from the transistor channel to/from source drain regions. Such source and drain extensions regions are simply referred to as the extensions. The diffusion process smears original source and drain dopant profiles resulting in a non-abrupt dopant profile at the interface between the channel and the extensions. Threshold voltages and the rate of transistor switching depend on, inter alia, the composition and the doping profile. Non-abrupt doping profiles retard device performance.